Ibm RS/6000 Manuel d'utilisateur télécharger pdf (Page 35)

Chapter 2. PCI-Based RS/6000 Server Hardware

The PCI-based RS/6000 server's hardware design is driven by accepted “industry

standards” both formal and de-facto. This means that open, standard interfaces

are used whenever possible, and much of the expansion of the system will be

performed by the end user utilizing standard adapters and controllers.

The design of the PCI-based RS/6000 servers is intended to have much in

common with the PC Server line of products from Boca Raton/Raleigh. The power

and mechanical packaging is the same as that used in the PC Company. In

addition, the electronics partitioning explained in 2.3, “Electronics Partitioning” on

page 19 was chosen so as to allow “processor card agility,” the ability to use either

an Intel x86 or PowerPC architecture processor card.

While the PCI-based RS/6000 servers use a PowerPC Reference Platform (PReP)

compatible basic system architecture, they also build upon the PReP architecture in

order to provide features that are demanded by systems used as servers. These

servers give the customer a basic set of features that make these systems different

from Client systems. These features enhance the performance of the system and

provide a higher level of RAS (Reliability/Availability/Serviceability) than is

commonly found on Client workstations. They include support for future SMP

configurations, standard use of fast L2 caches, large capacity for memory

expansion, higher performance memory subsystems, ECC error- correcting

memory, additional I/O card expansion capability, and higher performance I/O

buses (PCI & ISA). Moreover, the PCI-based RS/6000 servers provide support for

a wide range of devices and features.

2.1 The Hardware Design

The PCI-based RS/6000 servers, packaged in an industry standard tower, are

based on the PowerPC 604 processor.

Figure 5 on page 12 shows the logical block diagram for these servers. The

processor bus runs at 66 MHz and the L2 cache and the Memory Controller are

attached to it. The Memory Controller chip also acts as a PCI Bridge to the primary

PCI bus. Notice that the peripheral units are separated from the PowerPC

processor, the L2 cache and memory through the

Processor Memory Controller &

PCI Bridge

chip. This allows the Processor Local Bus to run at 66 MHz, while the

PCI bus runs at 33 MHz.

The primary PCI is a 32-bit bus. It drives two PCI expansion cards as well as the

secondary PCI bus bridge and the Extended Industry Standard Architecture (EISA)

bus bridge. The system flash EPROM (IPL ROS) is also connected to the primary

PCI bus.

The SCSI-2 Interface Controller and the other PCI slots are connected to the

secondary PCI bus, while the EISA bus allows the connection of on-board ISA

subsystems, such as standard I/O. ISA slots are provided on this bus for a

selection of ISA adapters.

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Ibm RS/6000 Manuel d'utilisateur Page 35

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